This methodology can efficiently implement several useful architectural features in asynchronous application-specific ICs (ASICs). These features include speculation, preemption, and eager evaluation. Throughput and energy savings can be significantly improved in systems involving high amounts of conditional computation. The energy savings can prove especially beneficial in systems with limited power/computation resources or high power consumption rates. Examples include portable devices such as cell phones, PDAs, iPods, laptops or search dedicated servers.
• Simple – two-phase protocol avoids the need for complex arbitration
• Efficient – throughput increases by up to 2.2x and up to 27% energy savings
• Reliable – protocol symmetrization eliminates glitches
- Counterflow Pipelining: Architectural Support for Preemption in Asynchronous Systems using Anti-Tokens IEEE Xplore Digital Library